A well-versed with research-oriented thinking abilities, and a fast kinesthetic learner with an innate natural curiosity for cutting-edge technologies, and proficient in Digital circuit design, IC layout designing, PCB designing, circuit designing, etc
24-hour digital clock design (my own idea) using J-K flip-flops and combinational logic circuits. Currently working on implementation in ZYNQ FPGA Arm development board
Design circuit, layout of a CMOS Inverter using 90nm node, and simulation of its various types of outcomes in Cadence Virtuoso
My own designed SSI(Small Scale Integration) Digital IC fully custom layout based on 180nm CMOS technology in Electric VLSI (open source) (without using Euler's rule) which will give us outputs of all the Logic gates.
An advanced version(using Euler's rule) of it's layout is designed using Cadence Layout XL based on 45nm technology.
A combinational logic circuit that will add, subtract, multiply, and divide between two given inputs at the same time using Deeds & VHDL, this circuit has been tested in Xilinx Spartan 6 FPGA board
A FPGA-based project in which I wrote "HELLO AMIT BARMAN" on a 16x2 LCD display using Verilog. This project is done using Xilinx Spartan 6 FPGA board and Xilinx ISE software.
Verilog HDL, Xilinx ISE, Xilinx Vivado, Electric VLSI system, Cadence Virtuoso
Silvaco
Analog - LTspice, Multisim & Digital - Deeds
Schematic, layout, 3D - KiCAD, EasyEDA
Raspberry Pi, ROS, Ardupilot, Gazebo, Arduino, NodeMCU - ESP8266, ESP32, l298n driver, nrf24l01 transceiver, joystick, Arduino IDE
8th rank in higher secondary education conducted by the West Bengal Council of Higher Secondary Education
A premier R & D unit of the Department of Atomic Energy, Government of India.
Hold a position of responsibility in the electronics domain, help to take decisions, represent ideas, etc